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ISA/PCI Reference CBI/CGI Technical Reference
Chassis Plans2-8
PCI LOCAL BUS
O
VERVIEW
The PCI (Peripheral Component Interconnect) Local Bus is a high performance, 32-bit or
64-bit bus with multiplexed address and data lines. It is intended for use as an inter-
connect mechanism between highly integrated peripheral controller components,
peripheral add-in boards and processor/memory systems.
The "local bus" moves peripheral functions with high bandwidth requirements closer to
the system’s processor bus and can produce substantial performance gains with graphical
user interfaces (GUIs) and other high bandwidth functions (i.e., full motion video, SCSI,
LANs, etc.).
The PCI Local Bus accommodates future system requirements and is applicable across
multiple platforms and architectures.
The PCI component and add-in card interface is processor independent, enabling an
efficient transition to future processor generations, by bridges or by direct integration,
and use with multiple processor architectures. Processor independence allows the PCI
Local Bus to be optimized for I/O functions, enables concurrent operation of the local
bus with the processor/memory subsystem, and accommodates multiple high perfor-
mance peripherals in addition to graphics. Movement to enhanced video and multimedia
displays and other high bandwidth I/O will continue to increase local bus bandwidth
requirements. A transparent 64-bit extension of the 32-bit data and address buses is
defined, doubling the bus bandwidth and offering forward and backward compatibility of
32-bit (132MB/s peak) and 64-bit (264MB/s peak) PCI Local Bus peripherals.