Kawasaki KS152JB Computer Hardware User Manual


 
KS152JB Universal Communications Controller
Technical Specifications
Kawasaki LSI USA, Inc. Page 38 of 120 Ver. 0.9 KS152JB2
PREAMBLE - The preamble is a series of alternating 1s and 0s. The length of the preamble is
programmable to be 0, 8, 32, or 64 bits. The purpose of the preamble is to allow all the receivers
to synchronize to the same clock edges and identifies to the other stations on-line that there is
activity indicating the link is being used. For these reasons zero preamble length is not compatible
with standard CSMA/CD, protocols. When using CSMA/CD, the BOF is considered part of the
preamble compared to SDLC, where the BOF is not part of the preamble. This means that if zero
preamble length were to be used in CSMA/CD, mode, no BOF would be generated. It is strongly
recommended that zero preamble length never be used in CSMA/CD mode. If the preamble con-
tains two consecutive 0s, The preamble is considered invalid. If the C152 detects an invalid pre-
amble, the frame is ignored.
BOF - In CSMA/CD the Beginning -Of-Frame is a part of the preamble and consists of two
sequential 1s. The purpose of the BOF is to identify the end of the preamble and indicate to the
receiver(s) that the address will immediately follow.
ADDRESS - The address field is used to identify which messages are intended for which stations.
The user must assign addresses to each destination and source. How the addresses are assigned,
how they are maintained, and how each transmitter is made aware of which addresses are avail-
able is an issue that is left to the user. Some suggestions are discussed in Section 3.5.5. Generally,
each address is unique to each station but there are special cases where this is not true. In these
special cases a message is intended for more than one station. These multi-targeted messages are
called broadcast or multicast-group address usually is indicated by using a 1 as the first address
bit. The user can choose to mask off all or selective bits of the address so that the GSC receives all
messages or multicast-group messages. The address length is programmable to be 8 or 16 bits. An
address consisting of all 1s will always be received by the GSC on the C152. The address bits are
always passed from the GSC to the CPU. With user software, the address can be extended beyond
16 bits, but the automatic address recognition will only work on a maximum of 16 bits. User soft-
ware will have to resolve any remaining address bits.
INFO - This is the information field and contains the data that one device on the link wishes to
transmit to another device. It can be of any length the user wishes but needs to be in multiples of 8
bits. This is because multiples of 8 bits are used to transfer data into or out of the GSC FIFOs. The
information field is delineated from the rest of the components of the frame by the preceding
address field and the following CRC. The receiver determines the position of the end of the infor-
mation field by passing the bytes through a temporary storage space. When the EOF is received
the bytes in temporary storage are the CRC, and the last bit received previous to the CRC consti-
tute the end of the information field.
CRC - The Cyclic Redundancy Check (CRC) is an error checking algorithm commonly used in
serial communications. The C152 offers two types of CRC algorithms, a 16-bit and a 32-bit. The
16-bit algorithm is normally used in the SDLC mode and will be described in the SDLC section.
In CSMA/CD applications either algorithm can be used but IEEE 802.3 uses a 32-bit CRC. The
generation polynomial the C152 uses with the 32-bit CRC is:
G(X) = X
32
+ X
26
+X
23
+X
22
+X
16
+X
12
+X
11
+X
10
+ X
8
+ X
7
+X
5
+X
4
+X
2
+ X +1