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KS152JB Universal Communications Controller
Technical Specifications
Kawasaki LSI USA, Inc. Page 82 of 120 Ver. 0.9 KS152JB2
4.3 Hold/Hold Acknowledge
Two operating modes of Hold/Hold Acknowledge logic are available, and either or neither may be
invoked by software. In one mode, the C152 generates a Hold Request signal and awaits a Hold
Acknowledge response before commencing a DMA that involves external RAM. This is called
the Requester Mode.
In the other mode, the C152 accepts a Hold Request signal from an external device and generates
a Hold Acknowledge signal in response, to indicate to the requesting device that the C152 will not
commence a DMA to or from external RAM while the Hold Request is active. This is called the
Arbiter mode.
4.3.1 REQUEST MODE
The Requester Mode is selected by setting the control bit REQ, which resides in PCON. In that
mode, when the C152 wants to do a DMA to External Data Memory, it first generates a Hold
Request signal,
HLD, and waits for a Hold Acknowledge signal, HLDA, before commencing the
DMA operation. Note that program execution continues while
HLDA is awaited. The DMA is not
begun until a logical 0 is detected at the
HLDA pin. Then, once the DMA has begun, it goes to
completion regardless of the logic level at
HLDA.
The protocol is activated only for DMA (not for program fetches or MOVX operations), and only
for DMAs to or from External Data Memory. If the data destination and source are both internal
to the C152, the
HLD/HLDA protocol is not used.
The
HLD output is an alternate function of port pin P1.5, and the HLDA input is an alternate
function of port pin P1.6
4.3.2 ARBITER MODE
For DMAs that are to be driven by some device other than the C152, a different version of the
Hold/Hold Acknowledge protocol is available. In this version, the device which is to drive the
DMA sends a Hold Request signal,
HLD, to the C152. I f the C152 is currently performing a
DMA to or from External Data Memory, it will complete this DMA before responding to the Hold
Request. When the C152 responds to the Hold Request, it does so by activating a Hold Acknowl-
edge signal,
HLDA. This indicates that the C152 will not commence a new DMA to or from
External Data Memory while
HLD remains active.
Note that in the Arbiter Mode the C152 does not suspend program execution at all, even if it is
executing from external program memory. It does not surrender use of its own bus.
The Hold Request input,
HLD, is at P1.5. The Hold Acknowledge output, HLDA, is at P1.6. This
version of the Hold/Hold Acknowledge feature is selected by setting the control bit ARB in
PCON.