Kawasaki KS152JB Computer Hardware User Manual


 
KS152JB Universal Communications Controller
Technical Specifications
Kawasaki LSI USA, Inc. Page 57 of 120 Ver. 0.9 KS152JB2
registers. On the DMA channel servicing the receiver, the control register needs to be loaded as
follows: DCONn.2 = 0, this sets the transfer mode so that response is to GSC interrupts and put
the DMA control in alternate cycle mode; DCONn.3 = 1, this enables the demand mode;
DCONn.4 = 0, this clears the automatic increment option for the source address; and DCONn.5 =
1, this defines the source as SFR, The DMA channel servicing the receiver also needs its source
address register to contain the address of RFIFO (SHRHN = XXH, SARLN = 0F4H). On the
DMA channel servicing the transmitter, the control register needs to be loaded as follows:
DCONn.2 = 0; DCONn.3 = 1; DCONn.6 = 0, this clears the automatic increment option for the
destination address; and DCONn.7 = 1, this sets the destination as SFR. The DMA channel serv-
ing the transmitter also requires that its destination address register contains the address of TFIFO
(DARHN = XXH, DARLN = 85H). Assuming that DCON0 would be serving the receiver and
DCON1 the transmitter, DCON0 would be loaded with XX1010X0B. The contents of SARH0
and DARH1 do not have any impact when using internal SFRs as the source or destination.
When using the DMA channels to service the GSC, the byte count registers will also need to be
initialized.
The Done flag for the DMA channel servicing the receiver should be used if fixed packet lengths
only are being transmitted or to insure that memory is not over-written by long received data
packets. Overwriting of data can occur when using a smaller buffer than the packet size. In these
cases the servicing of the DMA and/or GSC would be in response to the DMA Done flag when
the byte count reaches zero.
In some cases the buffer size is not the limiting factor and the packet length will be unknown. in
these cases it would be desirable to eliminate the function of the Done flag. To effectively disable
the Done flag for the DMA channel servicing the receiver, the byte count should be set to some
number larger than any packet that will be received, up to 64K. If not using the Done flag, then
GSC servicing would be driven by the receive Done (RDN) flag and /or interrupt. RDN is set
when the EOF is detected. When using the RDN flag, RFNE should also be checked to insure that
all the data has been emptied out of the receive FIFO.
The byte count register is used for all transmissions and this means that all packets going out will
have to be of the same length or the length of the packet to be sent will have to be known prior to
the start of transmission. When using the DMA channels to service the GSC transmitter, there is
no practical way to disable the Done flag. This is because the transmit done flag (TDN) is set
when the transmit FIFO is empty and the last message bit has been transmitted. But, when using
the DMA channel to service the transmitter, loads to the TFIFO continue to occur until the byte
count reaches 0. This makes it impossible to use TDN as a flag to stop the DMA transfers to
TFIFO. It is possible to examine some other registers or conditions, such as the current byte
count, to determine when to stop the DMA transfers to TFIFO, but this is not recommended as a
way to service the DMA and GSC when transmitting because frequent reading of the DMA regis-
ters will cause the effective DMA transfer rate to slow down.
When using the DMA channels, initialization of the GSC would be exactly the same as normal
except that TSTAT.0 = 1 (DMA), this informs the GSC that the DMA channels are going to be
used to service the GSC. Although only TSTAT is written to, both the receiver and transmitter use