Omron CS1W-EIP21 Network Card User Manual


 
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Communicating between OMRON PLCs Section 8-6
The execution status of the SEND(090), RECV(098), and CMND(490) instruc-
tions is always reflected by the communications flags (i.e., the Communica-
tions Port Enabled Flag and the Communications Port Error Flag). The CS/
CJ-series CPU Unit’s communications flags are allocated in the Auxiliary Area
as shown in the following table.
Note In CS/CJ-series PLCs, communications ports 0 to 7 are also used when exe-
cuting the PCMR(260) (PROTOCOL MACRO), TXDU(256), and RXDU(255)
instructions, so these flags are shared by SEND(090), RECV(098),
CMND(490), PCMR(260), TXDU(256), and RXDU(255).
SEND(090), RECV(098), and CMND(490) cannot be executed at a communi-
cations port if PCMR(260) TXDU(256), or RXDU(255) is being executed at
that port.
A
A
A
A
C
Execution
condition
Communications
Port Enabled Flag
KEEP(011) A
Reset B
Input A remains ON from start to completion of commu-
nications instruction.
Operand,
control data
created with
@MOV and
@XFER.
Creates operand and control data in a given
area.
Communications
Port Enabled Flag
DIFU(013) B
Executes communications instructions.
Communications
Port Error Flag
Reset D
Communications
Port Enabled Flag
KEEP(011) C
Creates reset input. (Turns reset B ON
after execution of communications in-
struction.)
Exclusive control so execution is not simultaneous.
Use exclusive control so that no other communica-
tions instructions are started before execution of the
above communications instruction is complete.
(Continued in same way.)
Execution
condition
Communications
instructions
@SEND
@RECV
@CMND
Send Error Flag display
(Retry can be executed.)
Flag name Address Contents
Word Bits
Communications Port
Enabled Flag
A202 Bit 7: Port 7
Bit 6: Port 6
Bit 5: Port 5
Bit 4: Port 4
Bit 3: Port 3
Bit 2: Port 2
Bit 1: Port 1
Bit 0: Port 0
OFF: Execution enabled
(being executed)
ON: Execution disabled
(not being executed)
Communications Port
Error Flag
A219 Bit 7: Port 7
Bit 6: Port 6
Bit 5: Port 5
Bit 4: Port 4
Bit 3: Port 3
Bit 2: Port 2
Bit 1: Port 1
Bit 0: Port 0
0: Normal completion
1: Abnormal completion