Texas Instruments TMS320DM648 Computer Drive User Manual


 
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4.12.26VideoDisplayFieldBitRegister(VDFBIT)
VideoDisplayRegisters
Figure4-56.VideoDisplayVerticalInterruptRegister(VDVINT)
3130282716
VIF2ReservedVINT2
R/W-0R-0R/W-0
151412110
VIF1ReservedVINT1
R/W-0R-0R/W-0
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table4-30.VideoDisplayVerticalInterruptRegister(VDVINT)FieldDescriptions
Bitfield
(1)
symval
(1)
ValueDescription
31VIF2OF(value)Verticalinterrupt(VINT)infield2enablebit.
DEFAULT0Verticalinterrupt(VINT)infield2isdisabled.
DISABLE
ENABLE1Verticalinterrupt(VINT)infield2isenabled.
30-28Reserved-0Reserved.Thereservedbitlocationisalwaysreadas0.Avaluewrittentothisfield
hasnoeffect.
27-16VINT2OF(value)0-FFFhLinewhereverticalinterrupt(VINT)occurs,ifVIF2bitisset.
DEFAULT0
15VIF1OF(value)Verticalinterrupt(VINT)infield1enablebit.
DEFAULT0Verticalinterrupt(VINT)infield1isdisabled.
DISABLE
ENABLE1Verticalinterrupt(VINT)infield1isenabled.
14-12Reserved-0Reserved.Thereservedbitlocationisalwaysreadas0.Avaluewrittentothisfield
hasnoeffect.
11-0VINT1OF(value)0-FFFhLinewhereverticalinterrupt(VINT)occurs,ifVIF1bitisset.
DEFAULT0
(1)
ForCSLimplementation,usethenotationVP_VDVINT_field_symval
Thevideodisplayfieldbitregister(VDFBIT)controlstheFbitvalueintheEAVandSAVtimingcontrol
codes.
TheFBITCLRandFBITSETbitscontroltheFbitvalueintheEAVandSAVtimingcontrolcodes.TheF
bitisclearedto0(indicatingfield1display)intheEAVcodeatthebeginningofthelinewheneverthe
framelinecounter(FLCOUNT)isequaltoFBITCLR.Itremainsa0forallsubsequentEAV/SAVcodes
untiltheEAVatthebeginningofthelinewhenFLCOUNT=FBITSETwhereitchangesto1(indicating
field2display).TheFbitoperationiscompletelyindependentoftheFLDcontrolsignal.
Forinterlacedoperation,FBITCLRandFBITSETaretypicallyprogrammedsuchthattheFbitchanges
coincidentlywithorsometimeaftertheVbittransitionsfrom1to0(asdeterminedbyVBITCLR1and
VBITCLR2inVDVBITn).Forprogressivescanoperationnofield2outputoccurs,soFBITSETshouldbe
programmedtoavaluegreaterthanFRMHEIGHTsothattheconditionFLCOUNT=FBITSETnever
occursandtheFbitisalways0.
Thevideodisplayfieldbitregister(VDFBIT)isshowninFigure4-57anddescribedinTable4-31.
SPRUEM1May2007VideoDisplayPort145
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