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6.5.2VICInputRegister(VICIN)
VICPortRegisters
TheDSPwritestheinputbitsforVCXOinterpolatedcontrolintheVICinputregister(VICIN).TheDSP
decideshowoftentoupdateVICIN.TheDSPcanwritetoVICINonlywhentheGObitintheVICcontrol
register(VICCTL)issetto1.TheVICmoduleusestheMSBsofVICINforprecisionvalueslessthan16.
TheVICinputregister(VICIN)isshowninFigure6-4anddescribedinTable6-5.
Figure6-4.VICInputRegister(VICIN)
3116
Reserved
R-0
150
VICINBITS
R/W-0
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table6-5.VICInputRegister(VICIN)FieldDescriptions
Bitfieldsymval
(1)
ValueDescription
31-16Reserved-0Reserved.Thereservedbitlocationisalwaysreadas0.Avaluewrittentothisfield
hasnoeffect.
15-0VICINBITSOF(value)0-FFFFhTheDSPwritestheinputbitsforVCXOinterpolatedcontroltotheVICinputbits.
DEFAULT0
(1)
ForCSLimplementation,usethenotationVIC_VICIN_VICINBITS_symval
VCXOInterpolatedControlPort 172SPRUEM1–May2007
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