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2.4.1VideoPortControlRegister(VPCTL)
VideoPortControlRegisters
Thevideoportcontrolregister(VPCTL)determinesthebasicoperationofthevideoport.
Notallcombinationsoftheportcontrolbitsareunique.ThecontrolbitencodingisshowninTable2-3.
AdditionalmodeoptionsareselectedusingthevideocapturechannelAcontrolregister(VCACTL)and
videodisplaycontrolregister(VDCTL).
Thevideoportcontrolregister(VPCTL)isshowninFigure2-1anddescribedinTable2-2.
Figure2-1.VideoPortControlRegister(VPCTL)
3116
Reserved
R-0
1514138
VPRSTVPHLTReserved
R/WS-0R/WC-1R-0
76543210
VCLK2PVCT3PVCT2PVCT1PReservedTCIDISPDCHNL
R/W-0R/W-0R/W-0R/W-0R-0R/W-0R/W-0R/W-0
LEGEND:R/W=Read/Write;R=Readonly;WC=Writea1toclear;WS=Write1toset,awriteof0hasnoeffect;-n=valueafterreset
Table2-2.VideoPortControlRegister(VPCTL)FieldDescriptions
Bitfield
(1)
symval
(1)
ValueDescription
31-16Reserved-0Reserved.Thereservedbitlocationisalwaysreadas0.Avaluewrittentothisfield
hasnoeffect.
15VPRSTOF(value)Videoportsoftwareresetenablebit.VPRSTissetbywritinga1.Writing0hasno
effect.
DEFAULT0Noeffect.
NO
RESET1FlushallFIFOsandsetallportregisterstotheirinitialvalues.VCLK1andVCLK2are
configuredasinputsandallVDATAandVCTLpinsareplacedinhighimpedance.
Auto-clearedafterresetiscomplete.
TheVPRSTbitmaytakeseveralclockcyclestoclearto0.TheVPRSTbitshouldbe
polledtomakesurethebitisclearedpriortowritingtothevideoportregisters.
14VPHLTOF(value)Videoporthaltbit.Thisbitissetuponhardwareorsoftwarereset.TheotherVPCTL
bits(exceptVPRST)canonlybechangedwhenVPHLTis1.VPHLTisclearedby
writinga1.Writing0hasnoeffect.
NONE0Noeffect.
DEFAULT1VPHLTiscleared.
CLEAR
13-6Reserved-0Reserved.Thereservedbitlocationisalwaysreadas0.Avaluewrittentothisfield
hasnoeffect.
7VCLK2POF(value)VCLK2pinpolaritybit.Hasnoeffectincapturemode.
DEFAULT0
NONE
REVERSE1InvertstheVCLK2outputclockpolarityindisplaymode.
6VCT3POF(value)VCTL3pinpolarity.DoesnotaffectGPIOoperation.IfVCTL3pinisusedasaFLD
inputonthevideocaptureside,thentheVCTL3polarityisnotconsidered;thefield
inverseiscontrolledbytheFINVbitinthevideocapturechannelxcontrolregister
(VCxCTL).
DEFAULT0IndicatestheVCTL3controlsignal(inputoroutput)isactivehigh.
NONE
ACTIVELOW1IndicatestheVCTL3controlsignal(inputoroutput)isactivelow.
(1)
ForCSLimplementation,usethenotationVP_VPCTL_field_symval
SPRUEM1–May2007VideoPort35
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