Fujitsu M400R Computer Hardware User Manual


 
12.3 Parallel Interface
12.3 Parallel Interface
Parallel interface
The Parallel interface is based upon IEEE1284. For details of the signal line configuration and
electrical standard, refer to the IEEE1284 specifications. Besides the hardware verification
mentioned above, the control codes (e.g., Chinese-character code and ESC sequence) supported by
the connected system must be checked before attempting to use the interface.
In the GP7000F, "Compatible," "Nibble" and "Byte" modes are supported. "ECP (Extended
Capabilities Port)" to "EPP (Enhanced Parallel Port)" modes are not supported as yet.
Terminal Distribution
IEEE1284-A from among IEEE1284 terminal distribution schemes is shown below. The following
table shows the pin numbers, sources and signal names. Sources identify the communicating status,
e.g., [from Host (H)], [from terminal (P)], and [bidirectional (Bi-Di)] (can be sent either from the
host or terminal equipment). The signal names identify those supported in the respective modes.
For the connecting information regarding the cables types, refer to the IEEE1284 specifications.
Table 12.6 IEEE1284-A Connector Terminal Distribution
Pin # Source Compatible Nibble Byte
1 H NStrobe HostClk
2 Bi-Di* Data 1 (Least Significant Bit)
3 Bi-Di* Data 2
4 Bi-Di* Data 3
5 Bi-Di* Data 4
6 Bi-Di* Data 5
7 Bi-Di* Data 6
8 Bi-Di* Data 7
9 Bi-Di* Data 8 (Most Significant Bit)
10 P NAck
11 P Busy
12 P Perror
13 P Select
14 P NAutoFd
PtrClk
PtrBusy
AckDataReq
Xflag
HostBusy
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