Intel CM8062101038606 Computer Hardware User Manual


 
Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families 13
Datasheet Volume One
Overview
1 Overview
1.1 Introduction
The Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families Datasheet -
Volume One provides DC specifications, signal integrity, differential signaling
specifications, land and signal definitions, and an overview of additional processor
feature interfaces.
The Intel® Xeon® processor E5-1600/E5-2600/E5-4600 product families are the next
generation of 64-bit, multi-core enterprise processors built on 32-nanometer process
technology. Throughout this document, the Intel® Xeon® processor E5-1600/E5-
2600/E5-4600 product families may be referred to as simply the processor. Where
information differs between the EP and EP 4S SKUs, this document uses specific Intel®
Xeon® processor E5-1600 product family, Intel® Xeon® processor E5-2600 product
family, and Intel® Xeon® processor E5-4600 product family notation.Based on the
low-power/high performance 2nd Generation Intel® Core™ Processor Family
microarchitecture, the processor is designed for a two chip platform consisting of a
processor and a Platform Controller Hub (PCH) enabling higher performance, easier
validation, and improved x-y footprint. The Intel® Xeon® processor E5-1600 product
family and the Intel® Xeon® processor E5-2600 product family are designed for
Efficient Performance server, workstation and HPC platforms. The Intel® Xeon®
processor E5-4600 product family processor supports scalable server and HPC
platforms of two or more processors, including “glueless” 4-way platforms. Note: some
processor features are not available on all platforms.
These processors feature per socket, two Intel® QuickPath Interconnect point-to-point
links capable of up to 8.0 GT/s, up to 40 lanes of PCI Express* 3.0 links capable of
8.0 GT/s, and 4 lanes of DMI2/PCI Express* 2.0 interface with a peak transfer rate of
5.0 GT/s. The processor supports up to 46 bits of physical address space and 48-bit of
virtual address space.
Included in this family of processors is an integrated memory controller (IMC) and
integrated I/O (IIO) (such as PCI Express* and DMI2) on a single silicon die. This single
die solution is known as a monolithic processor.
Figure 1-1 and Figure 1-2, shows the processor 2-socket and 4-socket platform
configuration. The “Legacy CPU” is the boot processor that is connected to the PCH
component, this socket is set to NodeID[0]. In the 4-socket configuration, the “Remote
CPU” is the processor which is not connected to the Legacy CPU.