Intel SE7320SP2 Computer Hardware User Manual


 
Intel® Server Board SE7320SP2 & Intel Server Board SE7525GP2 TPS Platform Management
Revision 2.0
118
5.2.12.3 System Identification in Alerts
The PET alert format used in PPP and LAN Alerting contains a system GUID field that can be
used to uniquely identify the system that raised the alert. In addition, since the PET is carried in
a UDP packet, the alerting system’s IP Address is also present.
5.2.12.4 Platform Alerting Setup
The management controller provides commands via the System Interface that support
setting/retrieving the alerting configuration LAN alerting in mBMC NV storage.
The user does not typically deal with filter contents directly. Instead, the Server Setup Utility
provides a user interface that allows the user to select among a fixed set of pre-configured
event filters.
The following list presents the type of Alerting configuration options that are provided:
Enabling/Disabling PEF.
Configuring Alert actions.
Selecting which pre-configured events trigger an alert.
Configuring the alert destination information, including LAN addresses.
5.2.12.5 Alerting On Power Down Events
A watchdog power-down event alert is sent after the power down so that the alert does not
delay the power-down action.
5.2.12.6 Alerting On System Reset Events
The alerting process must complete before the system reset is completed. This is done to
simplify timing interactions between the mBMC and BIOS initialization after a system reset.
5.2.12.7 Alert-in-Progress Termination
An alert in progress will be terminated by a system reset or power on, or by disabling alerting via
commands to the management controller.
5.2.13 NMI Generation
The following may cause the mBMC to generate an NMI pulse:
Receiving a Chassis Control command issued from one of the command interfaces. Use
of this command will not cause an event to be logged in the SEL.
Detecting that the front panel Diagnostic Interrupt (NMI) button has been pressed.
A PEF table entry matching an event where the filter entry has the NMI action indicated.
A processor IERR or Thermal Trip (if the mBMC is so configured).
Watchdog timer pre-timeout expiration with NMI pre-timeout action enabled.
The mBMC-generated NMI pulse duration is 200ms. This time is chosen to try to avoid the
BIOS missing the NMI if the BIOS is in the SMI Handler and the SMI Handler is masking the
NMI.
Once an NMI has been generated by the mBMC, the mBMC will not generate another until the
system has been reset or powered down except that enabling NMI via an NMI Enable/Disable
command will re-arm the NMI.