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Chapter 4 Register-Level Programming
© National Instruments Corporation 4-13 PC-DIO-96 User Manual
The control word written to the CNFG Register to configure port B for input in mode 1 is shown
as follows. Notice that port B does not have extra input or output lines from port C.
D2 D1 D0D3D7
D6 D5
D4
1
X
X
X 1 1 X
X
During a mode 1 data read transfer, the status of the handshaking lines and interrupt signals can
be obtained by reading port C. The port C status-word bit definitions for an input transfer are
shown as follows.
Port C status-word bit definitions for input (port A and port B):
D7 D6 D5 D4 D3 D2 D1 D0
I/O I/O IBFA INTEA INTRA INTEB IBFB INTRB
Bit Name Description
7–6 I/O Input/Output—These bits can be used for general-purpose I/O
when port A is in mode 1 input. If these bits are configured for
output, the port C bit set/reset function must be used to manipulate
them.
5 IBFA Input Buffer for Port A—A high setting indicates that data has
been loaded into the input latch for port A.
4 INTEA Interrupt Enable Bit for Port A—Setting this bit enables interrupts
from port A of the 82C55A . This bit is controlled by
setting/resetting PC4.
3 INTRA Interrupt Request Status for Port A—When INTEA and IBFA are
high, this bit is high, indicating that an interrupt request is pending
for port A.
2 INTEB Interrupt Enable Bit for Port B—Setting this bit enables interrupts
from port B of the 82C55A . This bit is controlled by
setting/resetting PC2.
1 IBFB Input Buffer for Port B—A high setting indicates that data has
been loaded into the input latch for port B.
0 INTRB Interrupt Request Status for Port B—When INTEB and IBFB are
high, this bit is high, indicating that an interrupt request is pending
for port B.