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58 MSC8101ADS RevB User’s Manual MOTOROLA
Functional Description
TABLE 5-11. Peripheral’s Availability Decoding.
5•11•3 BCSR2 - Board Control / Status Register 2
BCSR2 is a status register which is accessed as word at offset 8 from the BCSR base address.
Its a Read-Only register which may be read at any time. BCSR2’s various fields are described in
TABLE 5-12. "BCSR2 Description" on page 58
Enable to:
BCSR Control Bits
FETHIEN
1.4
T1_1EN
0.3
T1_234EN
0.4
CODEC_EN
1.1
CODEC
a
a. Power-on default mode is enable for CODEC and disable for the
rest peripherals.
xx x 0
T1/E1
channels
2-4
1x
0 x
FETH 0 x x x
T1/E1
channel
1
x0 x 1
TABLE 5-12. BCSR2 Description
BIT MNEMONIC Function
DEF
SET
ATT.
0 - 7 TSTAT(0:7) Tool Status (0:7). This field is reserved for external tool status report. The
exact meaning of each bit within this field is tool unique and therefore will be
documented separately per each tool. These signals are available at the
System Expansion connector.
-R
8 - 11 TOOLREV(0:3) Tool Revision (0:3). This field may contains the revision code of an
external tool connected to the ADS. The various combinations of this field
will be described per each tool user’s manual. These signals are available
at the System Expansion connector.
-R
12 - 15 EXTTOLI(0:3) External Tools Identification. These lines, which are available at the CPM
expansion connectors, are intended to serve as tools’ identifier. On-board S/
W may check these lines to detect The presence of various tools (h/w
expansions) at the CPM Expansion connectors. For the external tools’
codes and their associated combinations see
TABLE 5-16.
"EXTOOLI(0:3) Assignment" on page 61
.
-R
16 - 17 SWOPT(0:1)
a
Software Option (0:1). Two bits shows the state of a dedicated dip-
switches providing an option to manually change a program flow.
0R
18 HOSTCFG
Host Configuration Set. This is high when the MSC8101 is configured for
PPC bus Normal Mode, if low - Host I/F is enable.
1 R
19 B64_32 Data Bus 64/32 bit. This line is connected to address mux switch for
manually setting the PPC bus width. When it is high the PPC bus is 64-bit
width, if low - 32-bit width.
1 R
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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