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Rev.2.00 Nov 28, 2005 page 271 of 378
REJ09B0124-0200
M16C/6N Group (M16C/6NK, M16C/6NM) 21. Flash Memory Version
Under development
This document is under development and its contents are subject to change.
21.3.4 Precautions on CPU Rewrite Mode
21.3.4.1 Operating Speed
Set the CM06 bit in the CM0 register and the CM17 to CM16 bits in the CM1 register to clock frequency
of 10 MHz or less before entering CPU rewrite mode (EW0 or EW1 mode). Also, set the PM17 bit in the
PM1 register to “1” (with wait state).
21.3.4.2 Prohibited Instructions
The following instructions cannot be used in EW0 mode because the CPU tries to read data in flash
memory: UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction
21.3.4.3 Interrupts (EW0 Mode)
• To use interrupts having vectors in a relocatable vector table, the vectors must be relocated to the RAM
area.
_______
• The NMI and watchdog timer interrupts are available since the FMR0 and FMR1 registers are forcibly
reset when either interrupt request is generated. Allocate the jump addresses for each interrupt service
_______
routines to the fixed vector table. Flash memory rewrite operation is aborted when the NMI or watchdog
timer interrupt request is generated. Execute the rewrite program again after exiting the interrupt routine.
• The address match interrupt is not available since the CPU tries to read data in the flash memory.
21.3.4.4 Interrupts (EW1 Mode)
• Do not acknowledge any interrupts with vectors in the relocatable vector table or address match interrupt
during the auto program or auto erase period.
• Do not use the watchdog timer interrupt.
_______
• The NMI interrupt is available since the FMR0 and FMR1 registers are forcibly reset when the interrupt
request is generated. Allocate the jump address for the interrupt service routine to the fixed vector table.
_______
Flash memory rewrite operation is aborted when the NMI interrupt request is generated. Execute the
rewrite program again after exiting the interrupt service routine.
21.3.4.5 How to Access
To set the FMR01, FMR02 or FMR11 bit to “1”, write “1” after first setting the bit to “0”. Do not generate
an interrupt or a DMA transfer between the instruction to set the bit to “0” and the instruction to set the bit
_______
to “1”. Set the bit while an “H” signal is applied to the NMI pin.
21.3.4.6 Rewriting in User ROM Area (EW0 Mode)
The supply voltage drops while rewriting the block where the rewrite control program is stored, the flash
memory cannot be rewritten because the rewrite control program is not correctly rewritten. If this error
occurs, rewrite the user ROM area while in standard serial I/O mode or parallel I/O mode or CAN I/O
mode.
21.3.4.7 Rewriting in User ROM Area (EW1 Mode)
Avoid rewriting any block in which the rewrite control program is stored.
21.3.4.8 DMA Transfer
In EW1 mode, do not perform a DMA transfer while the FMR00 bit in the FMR0 register is set to “0” (auto
programming or auto erasing).