Filter
Top Products
A-1
Table of Contents
SFR Page Reference ............................................................................................................ B-1
1. Overview ............................................................................................................................... 1
1.1 Applications ..................................................................................................................................................1
1.2 Performance Outline ....................................................................................................................................2
1.3 Block Diagram ..............................................................................................................................................4
1.4 Product List ..................................................................................................................................................5
1.5 Pin Configuration .........................................................................................................................................6
1.6 Pin Description ........................................................................................................................................... 13
2. Central Processing Unit (CPU) ........................................................................................... 16
2.1 Data Registers (R0, R1, R2, and R3) ........................................................................................................16
2.2 Address Registers (A0 and A1) ..................................................................................................................16
2.3 Frame Base Register (FB) .........................................................................................................................17
2.4 Interrupt Table Register (INTB) ..................................................................................................................17
2.5 Program Counter (PC) ...............................................................................................................................17
2.6 User Stack Pointer (USP), Interrupt Stack Pointer (ISP) ........................................................................... 17
2.7 Static Base Register (SB) ..........................................................................................................................17
2.8 Flag Register (FLG) ...................................................................................................................................17
2.8.1 Carry Flag (C Flag) ............................................................................................................................17
2.8.2 Debug Flag (D Flag) ..........................................................................................................................17
2.8.3 Zero Flag (Z Flag) ..............................................................................................................................17
2.8.4 Sign Flag (S Flag) ..............................................................................................................................17
2.8.5 Register Bank Select Flag (B Flag)....................................................................................................17
2.8.6 Overflow Flag (O Flag).......................................................................................................................17
2.8.7 Interrupt Enable Flag (I Flag) .............................................................................................................17
2.8.8 Stack Pointer Select Flag (U Flag).....................................................................................................17
2.8.9 Processor Interrupt Priority Level (IPL) ..............................................................................................17
2.8.10 Reserved Area ................................................................................................................................. 17
3. Memory ............................................................................................................................... 18
4. Special Function Register (SFR)......................................................................................... 19
5. Reset ................................................................................................................................... 35
5.1 Hardware Reset .........................................................................................................................................35
5.1.1 Reset on a Stable Supply Voltage .....................................................................................................35
5.1.2 Power-on Reset .................................................................................................................................35
5.2 Software Reset ..........................................................................................................................................37
5.3 Watchdog Timer Reset...............................................................................................................................37
5.4 Oscillation Stop Detection Reset ............................................................................................................... 37
5.5 Internal Space ............................................................................................................................................ 37
6. Processor Mode .................................................................................................................. 38
6.1 Types of Processor Mode .......................................................................................................................... 38
6.2 Setting Processor Modes ........................................................................................................................... 39
7. Bus ...................................................................................................................................... 45
7.1 Bus Mode ................................................................................................................................................... 45
7.1.1 Separate Bus .....................................................................................................................................45
7.1.2 Multiplexed Bus..................................................................................................................................45