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S3C9228/P9228 PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
8-Bit Timer/
CounterA
Port I/O and Interrupt
Control
SAM88RCRI CPU
RESET
X
IN
XT
IN
I/O Port 0
8-Kbyte
ROM
264-Byte
Register
File
X
OUT
XT
OUT
16-Bit
Timer/
Counter1
8-Bit Timer/
CounterB
TAOUT/
P0.0
T1CLK/
P0.1
P0.0/TAOUT/INT
P0.1/T1CLK/INT
P0.2/INT
P0.3/BUZ/INT
P0.4
P0.5
I/O Port 1
P1.0/AD0/INT
P1.1/AD1/INT
P1.2/AD2/INT
P1.3/AD3/INT
I/O Port 2
P2.0/SCK/SEG1
P2.1/SO/SEG0
P2.2/SI
P2.3
I/O Port 3
P3.0/INTP/SEG3
P3.1/INTP/SEG2
I/O Port 4
P4.0-P4.7/
SEG4-SEG11
I/O Port 5
P5.0-P5.3/
SEG12-SEG15
P5.4-P5.7/
SEG16-SEG19/
COM7-COM4
Watchdog
Timer
Basic Timer
Watch Timer
LCD
Driver/
Controller
SIO
A/D Converter
COM0-COM3/P6.3-P6.0
COM4-COM7/
SEG19-SEG16/P5.7-P5.4
SEG0-SEG1/P2.1-P2.0
SEG2-SEG3/P3.1-P3.0
SEG4-SEG11/P4.0-P4.7
P2.0/SCK/SEG1
P2.1/SO/SEG0
P2.2/SI
BUZ/P0.3
P1.0-P1.3/AD0-AD3
SEG12-SEG15/P5.0-P5.3
I/O Port 6 P6.0-P6.3/COM3-COM0
Figure 1-1. Block Diagram