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S3C9228/P9228 CONTROL REGISTERS
4-9
INTPND1 — Interrupt Pending Register 1 D6H
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
RESETRESET Value
0 0 0 0 0 0 0 0
Read/Write
R/W R/W R/W R/W R/W R/W R/W R/W
.7 P1.3's Interrupt Pending Bit
0 No interrupt pending (when read), clear pending bit (when write)
1 Interrupt is pending (when read)
.6 P1.2's Interrupt Pending Bit
0 No interrupt pending (when read), clear pending bit (when write)
1 Interrupt is pending (when read)
.5 P1.1's Interrupt Pending Bit
0 No interrupt pending (when read), clear pending bit (when write)
1 Interrupt is pending (when read)
.4 P1.0's Interrupt Pending Bit
0 No interrupt pending (when read), clear pending bit (when write)
1 Interrupt is pending (when read)
.3 P0.3's Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
.2 P0.2's Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
.1 P0.1's Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
.0 P0.0's Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
NOTE: Refer to Page 5-6 to clear any pending bits.