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S3C9228/P9228 S3P9228 OTP
18-3
Table 18-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip During Programming
Pin Name Pin Name Pin No. I/O Function
P1.2 SDAT 3 (9) I/O Serial data pin. Output port when reading and
input port when writing. Can be assigned as a
Input/push-pull output port.
P1.3 SCLK 4 (10) I/O Serial clock pin. Input only pin.
TEST
V
PP
(TEST)
9 (15) I Power supply pin for EPROM cell writing
(indicates that OTP enters into the writing
mode). When 12.5 V is applied, OTP is in
writing mode and when 5 V is applied, OTP is in
reading mode. (Option)
RESET RESET
12 (18) I Chip initialization
V
DD
/V
SS
V
DD
/V
SS
5/6 (11/12) I
Logic power supply pin. V
DD
should be tied to
+ 5 V during programming.
NOTE: Parentheses indicate pin number for 42-SDIP package.
Table 18-2. Comparison of S3P9228 and S3C9228 Features
Characteristic S3P9228 S3C9228
Program Memory 8 Kbyte EPROM 8 Kbyte mask ROM
Operating Voltage (V
DD
)
2.0 V to 5.5 V 2.0 V to 5.5 V
OTP Programming Mode
V
DD
= 5 V, V
PP
(TEST)=12.5V
Pin Configuration 44-QFP, 42-SDIP 44-QFP, 42-SDIP
EPROM Programmability User Program 1 time Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
PP
(TEST) pin of the S3P72C8, the EPROM programming mode is entered.
The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 17-3 below.
Table 18-3. Operating Mode Selection Criteria
V
DD
V
PP
(TEST) REG/MEM Address
(A15-A0)
R/W Mode
5 V 5 V 0 0000H 1 EPROM read
12.5 V 0 0000H 0 EPROM program
12.5 V 0 0000H 1 EPROM verify
12.5 V 1 0E3FH 0 EPROM read protection
NOTE: "0" means Low level; "1" means High level.