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CONTROL REGISTERS S3C9228/P9228
4-36
TACON — Timer 1/A Control Register BBH
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
RESETRESET Value
0 0 0 0 0 0 0 –
Read/Write
R/W R/W R/W R/W R/W R/W R/W –
.7 Timer 1 Mode Selection Bit
0 Two 8-bit timers mode (Timer A/B)
1 One 16-bit timer mode (Timer 1)
.6-.4 Timer 1/A Clock Selection Bits
0 0 0 fxx/512
0 0 1 fxx/256
0 1 0 fxx/64
0 1 1 fxx/8
1 0 0 fxx (system clock)
1 0 1 fxt (sub clock)
1 1 0 T1CLK (external clock)
1 1 1 Not available
.3 Timer 1/A Counter Clear Bit
0 No effect
1 Clear the timer 1/A counter (when write)
.2 Timer 1/A Counter Enable Bit
0 Disable counting operation
1 Enable counting operation
.1 Timer 1/A Interrupt Enable Bit
0 Disable interrupt
1 Enable interrupt
.0 Bit 0
Not used for S3C9228/P9228