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S3C9228/P9228 CONTROL REGISTERS
4-7
CLKCON — System Clock Control Register D4H
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
RESETRESET Value
0 0 0 0 0 0 0 0
Read/Write
R/W R/W R/W R/W R/W R/W R/W R/W
.7 Oscillator IRQ Wake-up Function Bit
0 Enable IRQ for main or sub oscillator wake-up in power down mode
1 Disable IRQ for main or sub oscillator wake-up in power down mode
.6-.5 Bits 6-5
0 Always logic zero
.4-.3 CPU Clock (System Clock) Selection Bits
0 0 Divide by 16 (fxx/16)
0 1 Divide by 8 (fxx /8)
1 0 Divide by 2 (fxx /2)
1 1 Non-divided clock (fxx)
.2-.0 Bits 2-0
0 Always logic zero