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CONTROL REGISTERS S3C9228/P9228
4-10
INTPND2 — Interrupt Pending Register 2 D7H
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
RESETRESET Value
– – 0 0 0 0 0 0
Read/Write
– – R/W R/W R/W R/W R/W R/W
.7-.6
Not used for S3C9228/P9228
.5 P3.1 (INTP) Interrupt Pending Bit
0 No interrupt pending (when read), clear pending bit (when write)
1 Interrupt is pending (when read)
.4 P3.0 (INTP) Interrupt Pending Bit
0 No interrupt pending (when read), clear pending bit (when write)
1 Interrupt is pending (when read)
.3 Watch Timer Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
.2 SIO Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
.1 Timer B Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
.0 Timer 1/A Interrupt Pending Bit
0
No interrupt pending (when read), Clear pending bit (when write)
1
Interrupt is pending (when read)
NOTE: Refer to Page 5-6 to clear any pending bits.