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I/O PORTS S3C9228/P9228
9-12
Port 3 Interrupt Control Register (P3INT)
F7H, Page 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
Not used
P3INT bit configuration settings:
0
1
Enable interrupt
Disable interrupt
P3.1
(INTP)
P3.0
(INTP)
Figure 9-15. Port 3 Interrupt Control Register (P3INT)
Port 3 Interrupt Pending Bits (INTPND2.5-.4)
D7H, Page 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
INTPND2 bit configuration settings:
0
1
Interrupt is pending (when read)
No interrupt pending (when read), clear pending bit (when write)
Timer 1/ANot used
Timer B
SIO
Watch Timer
P3.0 (INTP)
P3.0 (INTP)
Figure 9-16. Port 3 Interrupt Pending Bits (INTPND2.5-.4)