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EMC Connectrix DS-32B2 and ED-12000B Fabric OS Reference Manual
Telnet Commands
Subtest 3 is not available on 2 G based switches.
The test method is as follows:
1. Fill the Central Memory of all ASICs with unique frames.
2. Set up the hardware such that each ASIC is read by all of the
MAX number of ports in the switch. Data received is compared
against the frame written into the ASIC.
• Port 0 reads the Central Memory in ASIC 0
• Port 1 reads the Central Memory in ASIC 0
• Port 14 reads the Central Memory in ASIC 0
• Port 15 reads the Central Memory in ASIC 0
• Port 0 reads the Central Memory in ASIC 1
• Port 1 reads the Central Memory in ASIC 1
• Port 14 reads the Central Memory in ASIC 1
• Port 15 reads the Central Memory in ASIC 1
• Port 15 reads the Central Memory in ASIC 2
• Port 15 reads the Central Memory in ASIC 3
3. Repeat the steps above for the complemented pattern.
4. Repeat for each mini-switch in the blade under test.
The pattern used is generated similarly as in subtest 2 above except
that only 2112 bytes are generated.
Subtest 4
The forced bad parity error subtest verifies that a bad parity can be
detected, its error flag set, and an interrupt bits are set.
The test method is as follows:
1. Clear the error and interrupt bits of all ASICs.
2. Write 64 bytes with bad parity to all ASICs at offset 0.
3. Read each of the ASICs at offset 0 & check that the error and
interrupt bits are set.
4. Repeat the steps above for offset 1, 2, 3, ... 10.