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MultiProcessor Specification
B-2 Version 1.4
The operating system’s first task is to determine whether the system conforms to the MP
specification. This is done by searching for the MP floating pointer structure. If a valid floating
pointer structure is detected, it indicates that the system is MP-compliant, and the operating system
should continue to look for the MP configuration table. If the system is not MP-compliant, the
operating system may attempt other means of MP system detection, if it is capable of doing so, or
treat the system as a uniprocessor system.
B.2 Operating System Booting and Self-configuration
An MP configuration table is required by the MP specification, with the exception of the default
system configurations defined in Chapter 5. The table should be treated as read-only by the
operating system. If the MP configuration table exists, the BSP should access the processor entries
in the table to configure the operating system.
The BSP should later configure the operating system based on the bus, I/O APIC, IRQs, and
system interrupt assignment entries of the configuration table. Note that certain types of buses are
mutually exclusive, such as EISA with MCA, or ISA with MCA. The operating system may report
such errors in the configuration table, if they occur.
If the MP configuration table does not exist, the BSP configures
the operating system for the
default system configuration indicated by the default configuration bits of the MP feature
information bytes. In this case, only two processors and one I/O APIC exist in the system; both
processors have the same type and features.
The operating system contains a set of predefined internal configuration tables that represent the
default configurations described in Chapter 5. For MP-compliant systems that use one of the
default configurations, the operating system derives the required configuration information from
the corresponding predefined table.
To wake up the AP, the BSP should use the universal algorithm defined in Section B.4.
B.3 Interrupt Mode Initialization and Handling
At the time the operating system boots, the interrupt structure is configured for DOS compatibility.
The system may be running either in PIC Mode or in Virtual Wire Mode. If it is in PIC Mode, the
NMI and INTR will bypass the BSP’s local APIC when the Interrupt Mode Configuration Register
(IMCR) has a value of zero. The operating system should not try to read the IMCR because it may
not exist.
The operating system should switch over to Symmetric I/O Mode to start multiprocessor operation.
If the IMCRP bit of the MP feature information bytes is set, the operating system must set the
IMCR to APIC mode. The operating system should not write to the IMCR unless the IMCRP bit
is set.