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S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X I/O PORTS
9-5
Port 0 Pull-up Control Register (P0PUR)
E6H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P0PUR bit configuration settings:
0
1
Enable pull-up resistor
Disable pull-up resistor
P0.3 P0.2 P0.1 P0.0
P0.7 P0.6 P0.5 P0.4
NOTE:
A pull-up resistor of port 0 is automatically disabled when the
corresponding pin is selected as push-pull output or alternative
function.
Figure 9-4. Port 0 Pull-up Control Register (P0PUR)
External Interrupt Control Register, Low Byte (EXTICONL)
E9H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P1.3/INT3
EXTICONL bit configuration settings:
00
01
Enable interrupt by falling edge
Disable interrupt
10
11
Enable interrupt by both falling and rising edge
Enable interrupt by rising edge
P0.2/INT2 P0.1/INT1 P0.0/INT0
Figure 9-5. External Interrupt Control Register, Low Byte (EXTICONL)