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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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6.10 Superload Operation Timing
See AC Characteristics Table 5.7 and Table 5.9
Superload Operation Timing Diagram
INT
A/DQ0:
A/DQ15
1st
Address
Host reads 1st
data from DataRAM
Setting
1st
Setting
Host reads nth
data from DataRAM
- 1st~nth Address Setting : Address Setting Operation for first page load(DFS, FBA, DBS and FPA).
- 1st Command Setting : 0000h, 2nd~nth Command Setting : 0003h
(In INT auto mode, writing 0 to Interrupt register may be ignored)
- In case of page transfer, sensing time is tRD2, in case of sector transfer, sensing time is tRD1.
- Host read 1st~nth data from DataRAM : Host can read data from DataRAM only synchronus read mode.
INT
A/DQ0:
A/DQ15
(cont.)
(cont.)
Command
2nd
Address
Setting
2nd
Setting
Command
Host reads (n-1) th
data from DataRAM
nth
Address
Setting
nth
Setting
Command
Host reads (n-2) th
data from DataRAM
tRD1 or tRD2
tRD1 or tRD2