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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
Program Operation Flow Diagram
NOTE :
1) DBS must be set before data input.
2) Data input could be done anywhere between "Start" and "Write Program Command".
3) FSA must be 00 within program operation.
4) BSA must be 1000 and BSC must be 000.
5) Writing System Configuration Register is optional.
6) ‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1
During the execution of the Internal Program Routine, the host is not required to provide any further controls or timings. Furthermore, all com-
mands, except a Reset command, will be ignored. A reset during a program operation will cause data corruption at the corresponding location.
If a program error is detected at the completion of the Internal Program Routine, map out the block, including the page in error, and copy the
target data to another block. An error is signaled if DQ10 = "1" of Controller Status Register(F240h).
If Power off occurs during a Program operation, the page that is being programmed might be corrupted. Data from paired pages may be
affected.
Start
Data Input
Write ‘DFS*, FBA’ of Flash
Add: F100h DQ=DFS*, FBA
Write ‘FPA, FSA’ of Flash
Add: F107h DQ=FPA, FSA
3)
Select DataRAM for DDP
1)
Add: F101h DQ=DBS*
Write Data into DataRAM
2)
ADD: DataRAM DQ=Data(4KB)
Write ‘Program’ Command
Add: F220h
DQ=0080h
Completed?
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
NO
YES
* DBS, DFS is for DDP
: If program operation results in an error, map out
the block including the page in error and copy the
target data to another block.
*
Write 0 to interrupt register
6)
Add: F241h DQ=0000h
Program completed
Read Controller
Status Register
Add: F240h DQ[10]=Error
DQ[10]=0?
Program Error
YES NO
Write ‘BSA, BSC’ of DataRAM
Add: F200h DQ=0800h
4)
Read Write Protection Status
Add: F24Eh DQ=US,LS,LTS
Write System Configuration
Add: F221h DQ=ECC
Register
5)