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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
Reset Interrupt (RSTI)
This is the Reset interrupt bit.
RSTI Interrupt [4]
2.8.23 Start Block Address Register F24Ch (R/W)
This Read/Write register shows the NAND Flash block address in the Write Protection mode. Setting this register precedes a 'Lock Block'
command, 'Unlock Block' command, or ‘Lock-Tight' Command.
F24Ch, default = 0000h
2.8.24 Start Block Address Register F24Dh (R/W)
This register is reserved for future use.
2.8.25 NAND Flash Write Protection Status Register F24Eh (R)
This Read register shows the Write Protection Status of the NAND Flash memory array.
To read the write protection status, FBA(DFS and DBS also in case of DDP) has to be set before reading the register
.
F24Eh, default = 0002h
Write Protection Status Information[2:0]
Status Conditions
Default State
Valid
State
Interrupt
Function
Cold Warm/hot
01 0 off
sets itself to ‘1’
At the completion of an Reset Operation
(00B0h, 00F0h, 00F3h or
warm reset is released)
0
1
Pending
clears to ‘0’
‘0’ is written to this bit, or
command is written to Command Register in INT
auto mode
1
0
off
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved(000000) SBA
Device Number of Block SBA
4Gb 1024 [9:0]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved(0000000000000) US LS LTS
Item Bit Definition Description
US 2 Unlocked Status 1 = current NAND Flash block is unlocked
LS 1 Locked Status
1 = current NAND Flash block is locked
Or First Block of NAND Flash Array is Locked to be OTP
LTS 0 Locked-Tight Status 1 = current NAND Flash block is locked-tight