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Preface
ARM DDI 0389B Copyright © 2006 ARM Limited. All rights reserved. xiii
Prefix B Denotes AXI write response channel signals.
Prefix C Denotes AXI low-power interface signals.
Prefix H Denotes Advanced High-performance Bus (AHB) signals.
Prefix P Denotes Advanced Peripheral Bus (APB) signals.
Prefix R Denotes AXI read data channel signals.
Prefix W Denotes AXI write data channel signals.
Numbering
The Verilog numbering convention is:
<size in bits>'<base><number>
This is a Verilog method of abbreviating constant numbers. For example:
• 'h7B4 is an unsized hexadecimal value.
• 'o7654 is an unsized octal value.
• 8'd9 is an eight-bit wide decimal value of 9.
• 8'h3F is an eight-bit wide hexadecimal value of
0x3F
. This is
equivalent to b00111111.
• 8'b1111 is an eight-bit wide binary value of b00001111.
Further reading
This section lists publications by ARM Limited, and by third parties.
ARM Limited periodically provides updates and corrections to its documentation. See
http://www.arm.com
for current errata sheets, addenda, and the Frequently Asked
Questions list.
ARM publications
This manual contains information that is specific to the AHB MC. See the following
documents for other relevant information:
• PrimeCell AHB SRAM/NOR Memory Controller (PL241) Integration Manual
(ARM DII 0151)
• PrimeCell AHB SRAM/NOR Memory Controller (PL241) Implementation Guide
(ARM DDI 0144)
• AMBA
™
Specification (Rev 2.0) (ARM IHI 0011)
• AMBA 3 APB Protocol v1.0 Specification (ARM IHI 0024).