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A block of data (64 bytes) always comes from one bank of DIMMs. An error code
containing the address of where a failure occurred, as well as the associated
syndrome, is logged when an ECC error occurs.
There are a total of four DIMM banks in the system unit.
DIMM Bank U Number
0 U0701 through U0704
1 U0801 through U0804
2 U0901 through U0904
3 U1001 through U1004
DIMM Bank PA[30:28]
0 0000
0001
1 0010
0011
2 1000
1001
3 1010
1011
C.1.4.2 Memory System Timing
The QSC ASIC generates the memory addresses and control signals to the memory
system. The UPA clock is the clock source for the QSC ASIC and operates as fast as
120 MHz.
C.1.5 Graphics and Imaging
The system unit takes advantage of UPA features to provide high-performance
graphics capabilities. High-performance graphics can include a vertical, single-buffer
UPA graphics card or a vertical, double-buffer plus Z (DBZ) UPA graphics card.
Functional Description 259