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MII is used to interconnect both integrated circuits and circuit assemblies. This
enables separate signal transmission paths to exist between the reconciliation
sublayer, embedded in the PCIO ASIC, and a local PHY IC, and between the
reconciliation sublayer and a remote PHY IC. The unidirectional paths between the
reconciliation sublayer and the local PHY IC are composed of sections A1, B1, C1
and D1. The unidirectional paths between the reconciliation sublayer and the remote
PHY IC are composed of sections A2, B2, C2, and D2.
C.1.11 SCSI
The system unit implements a small computer system interface (SCSI) Fast-20
(UltraSCSI) parallel interface bus. The UltraSCSI provides the following:
Efficient peer-to-peer I/O bus devices
Mechanical, electrical, and timing specification definition that support transfer
rates of 20 or 40 Mbytes per second (corresponding to the data path width of an
8-bit, or 16-bit bus, respectively)
Peak bandwidth of 40 Mbytes per second (with implemented 16-bit bus width)
The internal SCSI bus is terminated at each end. One set of terminators is located
close to the CD-ROM drive connector on the CD-ROM SCSI card. A second set of
terminators is located close to the 68-pin external SCSI connector.
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Sun Enterprise 220R Server Service Manual ♦ January 2000, Revision A