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EMAC Control Module Registers
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3.4 EMAC Control Module Interrupt Core Receive Threshold Interrupt Enable Registers
(C0RXTHRESHEN-C2RXTHRESHEN)
The EMAC control module interrupt core 0-2 receive threshold interrupt enable register
(CnRXTHRESHEN) is shown in Figure 15 and described in Table 12.
Figure 15. EMAC Control Module Interrupt Core 0-2 Receive Threshold Interrupt Enable Register
(CnRXTHRESHEN)
31 16
Reserved
R-0
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
RXCH7 RXCH6 RXCH5 RXCH4 RXCH3 RXCH2 RXCH1 RXCH0
THRESHEN THRESHEN THRESHEN THRESHEN THRESHEN THRESHEN THRESHEN THRESHEN
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 12. EMAC Control Module Interrupt Core 0-2 Receive Threshold Interrupt Enable Register
(CnRXTHRESHEN)
Bit Field Value Description
31-8 Reserved 0 Reserved
7 RXCH7THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 7
0 CnRXTHRESHPULSE generation is disabled for RX Channel 7.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 7.
6 RXCH6THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 6
0 CnRXTHRESHPULSE generation is disabled for RX Channel 6.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 6.
5 RXCH5THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 5
0 CnRXTHRESHPULSE generation is disabled for RX Channel 5.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 5.
4 RXCH4THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 4
0 CnRXTHRESHPULSE generation is disabled for RX Channel 4.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 4.
3 RXCH3THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 3
0 CnRXTHRESHPULSE generation is disabled for RX Channel 3.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 3.
2 RXCH2THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 2
0 CnRXTHRESHPULSE generation is disabled for RX Channel 2.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 2.
1 RXCH1THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 1
0 CnRXTHRESHPULSE generation is disabled for RX Channel 1.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 1.
0 RXCH0THRESHEN Enable CnRXTHRESHPULSE interrupt generation for RX Channel 0
0 CnRXTHRESHPULSE generation is disabled for RX Channel 0.
1 CnRXTHRESHPULSE generation is enabled for RX Channel 0.
60
EMAC/MDIO Module SPRUFL5B–April 2011
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