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EMAC Control Module Registers
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3.6 EMAC Control Module Interrupt Core Transmit Interrupt Enable Registers
(C0TXEN-C2TXEN)
The EMAC control module interrupt core 0-2 transmit interrupt enable register (CnTXEN) is shown in
Figure 17 and described in Table 14
Figure 17. EMAC Control Module Interrupt Core 0-2 Transmit Interrupt Enable Register (CnTXEN)
31 16
Reserved
R-0
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
TXCH7EN TXCH6EN TXCH5EN TXCH4EN TXCH3EN TXCH2EN TXCH1EN TXCH0EN
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 14. EMAC Control Module Interrupt Core 0-2 Transmit Interrupt Enable Register (CnTXEN)
Bit Field Value Description
31-8 Reserved 0 Reserved
7 TXCH7EN Enable CnTXPULSE interrupt generation for TX Channel 7
0 CnTXPULSE generation is disabled for TX Channel 7.
1 CnTXPULSE generation is enabled for TX Channel 7.
6 TXCH6EN Enable CnTXPULSE interrupt generation for TX Channel 6
0 CnTXPULSE generation is disabled for TX Channel 6.
1 CnTXPULSE generation is enabled for TX Channel 6.
5 TXCH5EN Enable CnTXPULSE interrupt generation for TX Channel 5
0 CnTXPULSE generation is disabled for TX Channel 5.
1 CnTXPULSE generation is enabled for TX Channel 5.
4 TXCH4EN Enable CnTXPULSE interrupt generation for TX Channel 4
0 CnTXPULSE generation is disabled for TX Channel 4.
1 CnTXPULSE generation is enabled for TX Channel 4.
3 TXCH3EN Enable CnTXPULSE interrupt generation for TX Channel 3
0 CnTXPULSE generation is disabled for TX Channel 3.
1 CnTXPULSE generation is enabled for TX Channel 3.
2 TXCH2EN Enable CnTXPULSE interrupt generation for TX Channel 2
0 CnTXPULSE generation is disabled for TX Channel 2.
1 CnTXPULSE generation is enabled for TX Channel 2.
1 TXCH1EN Enable CnTXPULSE interrupt generation for TX Channel 1
0 CnTXPULSE generation is disabled for TX Channel 1.
1 CnTXPULSE generation is enabled for TX Channel 1.
0 TXCH0EN Enable CnTXPULSE interrupt generation for TX Channel 0
0 CnTXPULSE generation is disabled for TX Channel 0.
1 CnTXPULSE generation is enabled for TX Channel 0.
62
EMAC/MDIO Module SPRUFL5B–April 2011
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