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EMAC Control Module Registers
3.5 EMAC Control Module Interrupt Core Receive Interrupt Enable Registers
(C0RXEN-C2RXEN)
The EMAC control module interrupt core 0-2 receive interrupt enable register (CnRXEN) is shown in
Figure 16 and described in Table 13
Figure 16. EMAC Control Module Interrupt Core 0-2 Receive Interrupt Enable Register (CnRXEN)
31 16
Reserved
R-0
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
RXCH7EN RXCH6EN RXCH5EN RXCH4EN RXCH3EN RXCH2EN RXCH1EN RXCH0EN
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 13. EMAC Control Module Interrupt Core 0-2 Receive Interrupt Enable Register (CnRXEN)
Bit Field Value Description
31-8 Reserved 0 Reserved
7 RXCH7EN Enable CnRXPULSE interrupt generation for RX Channel 7
0 CnRXPULSE generation is disabled for RX Channel 7.
1 CnRXPULSE generation is enabled for RX Channel 7.
6 RXCH6EN Enable CnRXPULSE interrupt generation for RX Channel 6
0 CnRXPULSE generation is disabled for RX Channel 6.
1 CnRXPULSE generation is enabled for RX Channel 6.
5 RXCH5EN Enable CnRXPULSE interrupt generation for RX Channel 5
0 CnRXPULSE generation is disabled for RX Channel 5.
1 CnRXPULSE generation is enabled for RX Channel 5.
4 RXCH4EN Enable CnRXPULSE interrupt generation for RX Channel 4
0 CnRXPULSE generation is disabled for RX Channel 4.
1 CnRXPULSE generation is enabled for RX Channel 4.
3 RXCH3EN Enable CnRXPULSE interrupt generation for RX Channel 3
0 CnRXPULSE generation is disabled for RX Channel 3.
1 CnRXPULSE generation is enabled for RX Channel 3.
2 RXCH2EN Enable CnRXPULSE interrupt generation for RX Channel 2
0 CnRXPULSE generation is disabled for RX Channel 2.
1 CnRXPULSE generation is enabled for RX Channel 2.
1 RXCH1EN Enable CnRXPULSE interrupt generation for RX Channel 1
0 CnRXPULSE generation is disabled for RX Channel 1.
1 CnRXPULSE generation is enabled for RX Channel 1.
0 RXCH0EN Enable CnRXPULSE interrupt generation for RX Channel 0
0 CnRXPULSE generation is disabled for RX Channel 0.
1 CnRXPULSE generation is enabled for RX Channel 0.
61
SPRUFL5B–April 2011 EMAC/MDIO Module
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