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Introduction
Software Developer’s Manual 1
Introduction 1
1.1 Scope
This document serves as a software developer’s manual for 82546GB/EB, 82545GM/EM,
82544GC/EI, 82541(PI/GI/EI), 82541ER, 82547GI/EI, and 82540EP/EM Gigabit Ethernet
Controllers. Throughout this manual references are made to the PCI/PCI-X Family of Gigabit
Ethernet Controllers or Ethernet controllers. Unless specifically noted, these references apply to all
the Ethernet controllers listed above.
1.2 Overview
The PCI/PCI-X Family of Gigabit Ethernet Controllers are highly integrated, high-performance
Ethernet LAN devices for 1000 Mb/s, 100 Mb/s and 10 Mb/s data rates. They are optimized for
LAN on Motherboard (LOM) designs, enterprise networking, and Internet appliances that use the
Peripheral Component Interconnect (PCI) and PCI-X bus.
Note: The 82541xx and 82540EP/EM do not support the PCI-X bus.
The 82547GI(EI) connects to the motherboard chipset through a Communications Streaming
Architecture (CSA) port. CSA is designed for low memory latency and higher performance than a
comparable PCI interface.
The remaining Ethernet controllers provide a 32-/64-bit, 33/66 MHz direct interface to the PCI
Local Bus Specification (revision 2.2 or 2.3), as well as the emerging PCI-X extension to the PCI
Local Bus (revision 1.0a).
The Ethernet controllers provide an interface to the host processor by using on-chip command and
status registers and a shared host memory area, set up mainly during initialization. The controllers
provide a highly optimized architecture to deliver high performance and PCI/CSA/PCI-X bus
efficiency. By implementing hardware acceleration capabilities, the controllers enable offloading
various tasks such as TCP/UDP/IP checksum calculations from the host processor. They also
minimize I/O accesses and interrupts required to manage the Ethernet controllers and provide a
highly configurable design that can be used effectively in various environments.
The PCI/PCI-X Family of Gigabit Ethernet Controllers handle all IEEE 802.3 receive and transmit
MAC functions. They contain fully integrated physical-layer circuitry for 1000 Base-T, 100 Base-
TX, and 10 Base-T applications (IEEE 802.3, 802.3u, and 802.3ab) as well as on-chip Serializer/
Deserializer (SerDes)
1
functionality that fully complies with IEEE 802.3z PCS.
1. The 82541xx, 82547GI/EI, and 82540EP/EM do not support any SerDes functionality.