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Software Developer’s Manual 323
Register Descriptions
When performing TCP segmentation, the packet prototype header initially transferred by DMA is
stored internally and updated as each packet of the TCP segmentation operation is composed. As
data for subsequent TCP segments is DMA’d into the Ethernet controller, the frame header for each
segment is dynamically inserted in front of the frame payload data stream prior to being written to
the packet buffer. In order to obtain the most efficient use of burst DMA operations, the transmit
DMA attempts to fetch as much data from a descriptor as possible, rather than limiting itself to
bursting each data segment individually. However, to do this, sufficient packet buffer space must
be reserved to account for all headers are inserted into the fetched data stream, as the burst might
span multiple data segments. The calculation of how much packet buffer space should be reserved
is dependent on the MSS being used, the maximum-sized data buffer pointed to by a descriptor,
and the current header size. This calculation is left to software to pre-calculate for the worst-case
usage. The TSPBP register allows configuration of this buffer space that must be reserved as “pad”
for worst-case header insertion. To ensure that this value does not prevent descriptors from being
serviced at all, it is necessary that the transmit packet buffer allocation should be larger than the
sum of (maximum TCP HDRLEN + maximum MSS + TMPBP + 80 bytes).
Because the DMA attempts to issue burst fetches for a much data as possible, it is possible for the
transmit DMA to cause the transmit packet buffer to approach fullness (less the pad specified).
However, if the packet buffer empties slightly, the transmit DMA could initiate a series of small
transfers. To further optimize the efficiency of the transmit DMA during TCP segmentation
operation, the TSMT register allows configuration of the minimum number of bytes that the DMA
should attempt to transfer in a single burst operation. The transmit DMA uses this value to refrain
from issuing a burst read until at least TSMT bytes of data from the current data descriptor can be
stored in the packet buffer. This check is ignored if, after a series of DMA operations, the
descriptor contains a smaller number of unfetched data bytes. To ensure that this minimum
threshold does not prevent descriptors from being serviced at all, it is necessary that the transmit
packet buffer allocation should be larger than the sum of (TSMT + TSPBP + 80 bytes). To ensure
compliance with PCI-X specifications, this value should not be programmed to exceed 4 KB (the
largest single-burst transfer allowed by PCI-X).
The transmit DMA further refrains from initiating service of a new data descriptor unless sufficient
packet buffer space exists to at least fetch a full data segment or complete a partially-fetched
segment.