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176 Software Developer’s Manual
Ethernet Interface
8.7.5 Transmission of PAUSE Frames
Transmitting PAUSE frames is enabled by software writing a 1b to the CTRL.TFCE bit. This bit is
mapped to bit 8 of the TXCW txConfigWord field. (ASM_DIR bit).
Similar to the reception flow control packets described earlier, XOFF packets can be transmitted
only if this configuration has been negotiated between the link partners via the Auto-Negotiation
process. In other words, the setting of this bit indicates the desired configuration. The resolution of
the Auto Negotiation process is discussed in Sections 8.6.3 and 8.6.4.
The contents of the Flow Control Receive Threshold High register (FCRTH) determine at what
point hardware transmits a PAUSE frame. Hardware monitors the fullness of the receive FIFO and
compares it with the contents of FCRTH. When the threshold is reached, hardware sends a PAUSE
frame with its pause time field equal to FCTTV. Once the receive buffer fullness reaches the low
water mark, hardware sends an XON message (a PAUSE frame with a timer value of 0b). Software
enables this capability with the XONE field of the FCRTL.
Hardware sends one more PAUSE frames if it has previously sent one and the FIFO overflows (so
the threshold must not be set greater than the FIFO size). This function is intended to minimize the
number of packets dropped if the first PAUSE frame does not reach its target.
Transmitting Flow Control frames should only be enabled in full duplex mode per the IEEE 802.3
standard. Software should ensure that the transmission of flow control packets is disabled when the
Ethernet controller is operating in half-duplex mode.
8.7.6 Software Initiated PAUSE Frame Transmission
The Ethernet controller has the added capability to transmit an XOFF frame through software. This
function is accomplished by software writing a 1b to the SWXOFF bit of the Transmit Control
register (TCTL). Once this bit is set, hardware initiates the transmission of a PAUSE frame in a
manner similar to that automatically generated by hardware.
The SWXOFF bit is self clearing after the PAUSE frame has been transmitted.
The state of the CTRL.TFCE bit or the negotiated flow control configuration does not affect
software generated PAUSE frame transmission.
Software sends an XON frame by programming a zero in the PAUSE timer field of the FCTTV
register.
Caution: Use of SWXOFF is not recommended due to security concerns.
8.7.7 External Control of Flow Control Operation
1
Transmitting XOFF and XON frames can be triggered by external pins. When enabled through
FCRTH.XFCE, the XOFF and XON inputs can be used to provide external effective threshold
information that initiate XOFF and XON transmission, respectively.
1. 82544GC/EI only.