Intel GD82559ER Network Card User Manual


 
GD82559ER — Networkin
g
Silicon
34
Datasheet
5.5 TriState
This command set all 82559ER Input and Output pins into a TRI-state (HIGH-Z) mode, all internal
pull-ups and pull-downs are disabled. This mode is entered by setting the following Test Pin Com-
binations: TEST = ‘1, TCK = ‘0, TEXEC = ‘0,
TI = ‘1, and resetting the device.
5.6 Nand - Tree
The NAND-Tree test mode is the most useful of the asynchronous test modes. The test enables the
placement of the 82559ER to be validated at board test. NAND-Tree was chosen for its speed
advantages. Modern automated test equipment can complete a complete peripheral scan without
support at the board level. This command connects all the outputs of the input-buffers in the device
periphery into a NAND - tree scheme. All the output drivers of the output-buffers except the TOUT
pin, are put into HIGH-Z mode. These pins can then be driven to affect the output of the tree. There
are two separate chains and associated outputs for speed. Any hard strapped pins will prevent the
tester from scanning correctly. This mode is enter by placing the Test Pin in the following Combi-
nations: TEST = ‘1, TCK = ‘0, TEXEC = ‘1, TI = ‘0
There are two nand-tree chains with two separate outputs assigned to FLOE# (Chain 1) and
FLWE# (Chain 2).
Table 2. Nand - Tree Chains
Chain Order Chain 1 Chain 2
1RST#LILED
2 IDSEL ACTLED#
3 REQ# SPEEDLED
4AD23ISOLATE#
5 SERR# ALTRST#
6 AD22 CLKRUN#
7 AD21 AD31
8 AD20 AD30
9 AD19 AD29
10 AD18 AD28
11 AD17 AD27
12 C/BE2# PME#
13 FRAME# AD26
14 IRDY# AD25
15 TRDY# C/BE3#
16 CLK AD24
17 DEVSEL# FLD0
18 INTA# FLD1
NAND-Tree Output FLOE# FLWE#