Intel S3420GP Computer Hardware User Manual


 
Glossary IntelP®P Server Board S3420GP TPS
Revision 1.0
Intel order number E65697-003
120
Term Definition
ICH I/O Controller Hub
ICMB Intelligent Chassis Management Bus
IERR Internal Error
IFB I/O and Firmware Bridge
ILM Independent Loading Mechanism
IMC Integrated Memory Controller
INTR Interrupt
I/OAT I/O Acceleration Technology
IOH I/O Hub
IP Internet Protocol
IPMB Intelligent Platform Management Bus
IPMI Intelligent Platform Management Interface
IR Infrared
ITP In-Target Probe
KB 1024 bytes
KCS Keyboard Controller Style
KVM Keyboard, Video, Mouse
LAN Local Area Network
LCD Liquid Crystal Display
LDAP Local Directory Authentication Protocol
LED Light Emitting Diode
LPC Low Pin Count
LUN Logical Unit Number
MAC Media Access Control
MB 1024 KB
MCH Memory Controller Hub
MD2 Message Digest 2 – Hashing Algorithm
MD5 Message Digest 5 – Hashing Algorithm – Higher Security
ME Management Engine
MMU Memory Management Unit
ms Milliseconds
MTTR Memory Type Range Register
Mux Multiplexor
NIC Network Interface Controller
NMI Nonmaskable Interrupt
OBF Output Buffer
OEM Original Equipment Manufacturer
Ohm Unit of electrical resistance
OVP Over-voltage Protection
PECI Platform Environment Control Interface
PEF Platform Event Filtering
PEP Platform Event Paging
PIA Platform Information Area (This feature configures the firmware for the platform hardware)
PLD Programmable Logic Device
PMI Platform Management Interrupt
POST Power-On Self Test