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IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs
power state signals from the chipset and de-asserts PS_PWR_ON to the power supply.
As a safety mechanism, if the BIOS fails to service the request, the Integrated BMC
automatically pow ff 4 to 5 se
Power Button — n to ating
If an ACPI operating system is running, pressing the power button switch generates a
request using SC o the ste e system. The operating
system retains c trol o m and olicy determines the
sleep state into which the system transitions, if any. Otherwise, the BIOS turns off the
system.
6.4.2 Reset B ton
The platform supports a front control panel reset button. Pressing the reset button initiates a
request forwarded by the Integrated BMC to the chipset. The BIOS does not affect the behavior
of the reset button.
6.4.3 NMI Butto
The Intel
®
S3420GP Server Board family BIOS does not support the NMI button.
6.4.4 System S tus LE
The Intel
®
Server Board S3420GP that uses the Intel
system status indicator LED on the front panel. This indicator LED has specific states and
corresponding interpretati as the fo
ers o the system in conds.
O Off (Oper system present)
I t operating sy m to shut down th
on f the syste the operating system p
ut
n
ta Indicator D
® ®
Xeon 3400 Series processor has a
on shown in llowing table.
Revision 1.0
Intel order number E65697-003
69