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IntelP®P Server Board S3420GP TPS Functional Architecture
3.3 Intel
®
3420 Chipset PCH
The Intel
®
3420 Chipset component is the Platform Controller Hub (PCH). The PCH is designed
for use with Intel
®
processor in a UP server platform. The role of the PCH in Intel
®
Server Board
S3420GP is to manage the flow of information between its eleven interfaces:
DMI interface to Processor
erface
SATA I
SPI Interface
3.4 I/O Sub
Intel
®
3420 Chipset PCH provides extensive I/O support.
rent PCI-E co nt on different board SKUs:
Intel
®
Server Board S3420GPLX
One PCI-E X16 slot connected to the PCI-E ports of CPU. Two PCI-E x8 slots and one SAS
of PCIe switch. One PCI-E X8 slot and one PCI-E x4 slot
ne PCI-E X8 slot connected to the PCI-E ports of CPU. One PCI-
>
The PCI Express* configuration uses standard mechanisms as defined in the PCI Plug-and-
Play specification. The initial recovered clock speed of 1.25 GHz results in 2.5 Gb/s/direction,
which provides a 250-MB/s communications channel in each direction (500 MB/s total). This is
close to twice the data rate of classic PCI. The fact that 8b/10b encoding is used accounts for
the 250 MB/s where quick calculations would imply 300 MB/s. The external graphics ports
support 5.0 GT/s speed as well. Operating at 5.0 GT/s results in twice as much bandwidth per
lane as compared to 2.5 GT/s operation.
PCI Express* Int
PCI Interface
nterface
USB Host Interface
SMBus Host Interface
LPC interface to IBMC
JTAG interface
LAN interface
ACPI interface
-system
3.4.1 PCI Express Interface
Two diffe nfigurations on single board are depende
z
module connected to PCI-E ports
connected to the PCI-E ports of PCH.
z Intel
®
Server Board S3420GPLC
One PCI-E X16 slot and o
E x8 slot connected to the PCI-E ports of PCH.
z Intel
®
Server Board S3420GPV
<TBD
There is one 32-bit, 33-MHz 5-V PCI slot.
Compatibility with the PCI addressing model is maintained to ensure all existing applications
and drivers operate unchanged.
Revision 1.0
Intel order number E65697-003
21