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Functional Architecture IntelP®P Server Board S3420GP TPS
You must observe the following general rules when selecting and configuring memory to obtain
the best performance from the system.
1. DDR3 RDIMMs must always be populated using a fill-farthest method.
2. DDR3 UDIMMs must always be populated on DIMM A1/A2/B1/B2.
3. Intel
®
Xeon
®
3400 Series Processors support either RDIMMs or UDIMMs.
4. RDIMM and UDIMM CANNOT be mixed.
5. The minimal memory set is {DIMMA1}.
6. DDR3 DIMMs on adjacent slots on the same channel do not need to be identical.
Each socket supports a maxim
r boards and systems that
use the Intel
®
3420 chipset support three slots per DDR3 channel, two DDR3 channels per
ard S3420GP.
This table defines half of the valid memory configurations. You can exchange Channel A DIMMs
with the DIMMs on Channel B to get another half.
Channel A Channel B
A1 A2 A3 B1 B2 B3
X
X X
um of six slots. Standard Intel
®
serve
socket, and only one socket is supported on the Intel
®
Server Bo
3.2.5.4 Memory Configuration Table
Table 4. Memory Configuration Table
X X X
X
X
X X
X
X X X X
X X
X X
X X X X X
RDIMM
X X X X X X
X
X X
X
X
X X
X
UDIMM
X X
X X
Revision 1.0
Intel order number E65697-003
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