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976 NTBK50 2.0 Mb PRI card
A description of each block follows.
The main functional blocks of the NTBK50 architecture are:
•
DS-30X interface
• A07 signaling interface
•
digital pad
•
carrier interface
• CEPT transceiver
•
SLIP control
•
D-channel support interface
•
clock controller interface
•
Card-LAN / echo / test port interface
•
80C51FA Microcontroller
DS-30X interface
NTBK50 interfaces to one DS-30X bus which contains 32-byte interleaved
timeslots operating at 2.56 Mb. Each timeslot contains 10 bits in A10
message format; eight are assigned to voice/data (64 Kbps), one to
signaling (8 Kbps), and one is a data valid bit (8 Kbps).
The incoming serial bit stream is converted to 8-bit parallel bytes to be
directed to padding control. The signaling bits are extracted and inserted
by the A07 signaling interface circuitry. Timeslots 0 and 16 are currently
unused for PCM.
NTBK50 interfaces to one DS-30X bus which contains 32 byte-interleaved
timeslots operating at 2.56 Mb. Each timeslot contains 10 bits in A10
message format; 8 are assigned to voice/data (64 Kbps), one to signaling (8
Kbps), and one is a data valid bit (8 Kbps).
The incoming serial bit stream is converted to 8-bit parallel bytes to be
directed to padding control. The signaling bits are extracted and inserted
by the A07 signaling interface circuitry. Timeslots 0 and 16 are currently
unused for PCM.
NTBK50 interfaces to one DS-30X bus which contains 32-byte interleaved
timeslots operating at 2.56 Mb. Each timeslot contains 10 bits in A10
message format; eight are assigned to voice/data (64 Kbps), one to
signaling (8 Kbps), and one is a data valid bit (8 Kbps).
Nortel Communication Server 1000
Circuit Card Reference
NN43001-311 01.04 Standard
Release 5.0 23 May 2008
Copyright © 2003-2008, Nortel Networks
.