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ThunderBird Avenger
TM
PCI Audio SAA7785
Accelerator
Philips Semiconductors Preliminary Specification
1999 Nov 12 51
TABLE 39 Class Code Register - CLASS (RO)
TABLE 40 CACHELINE Size Register - CACHELINE (RO)
TABLE 41 Master Latency Timer Register - LATIME (RW)
Bit Name R/W Function
7:0 REVISION_ID RO The current revision ID for the SSA7785 ThunderBird Avenger™ joystick.
PCI CFG 1 D23 D22 D21 D20 D19 D18 D17 D16
Offset 09h
BASE_CLASS[7:0]
POR Value
00001001
D15 D14 D13 D12 D11 D10 D9 D8
SUB_CLASS[7:0]
POR Value
10000000
D7 D6 D5 D4 D3 D2 D1 D0
PGM_IFACE[7:0]
POR Value
00000000
Bit Name R/W Function
23:16 BASE_CLASS RO The base class of 09h describes an input device.
15:8 SUB_CLASS RO The sub class of 80h describes a “other” input controller.
7:0 PGM_IFACE RO Device generic function identification.
PCI CFG 1D7D6D5D4D3D2D1D0
Offset 0Ch
CACHELINE[7:0]
POR Value
00000000
Bit Name R/W Function
7:0 CACHELINE RO Reserved for cache line size indicator.
PCI CFG 1D7D6D5D4D3D2D1D0
Offset 0Dh
LATIME[7:0]