Philips SAA7785 Computer Hardware User Manual


 
ThunderBird Avenger
TM
PCI Audio SAA7785
Accelerator
Philips Semiconductors Preliminary Specification
1999 Nov 12 62
TABLE 63 Subsystem Vendor ID - SUBVENID (RO)
TABLE 64 Subsystem ID - SUBSYSID (RO)
UARTBASE[15:8]
POR Value
00000000
D7 D6 D5 D4 D3 D2 D1 D0
UARTBASE[7:3] R R IO
POR Value
00000001
Bit Name R/W Function
31:3 UART-
BASE
RW 16650 UART base address. The address should be on a 8 byte boundary. For ref-
erence, 550 compatible UART legacy base addresses are 3E8h, 338h, 2E8h,
220h, 238h, 2E0h, 228h, 3F8h, and 2F8h.
2:1 R RO Reserved. These bits are reserved and always return zeros for plug and play.
0 IO RO I/O flag. This read only bit indicates that this is an I/O range.
PCI CFG 2 D15 D14 D13 D12 D11 D10 D9 D8
Offset 2Ch
SUBVEN_ID[15:8]
POR Value
00010000
D7 D6 D5 D4 D3 D2 D1 D0
SUBVEN_ID[7:0]
POR Value
00000100
Bit Name R/W Function
15:0 SUBVEN_ID RO Subsystem Vendor ID. The Subsystem Vendor ID register allows the manu-
facturer to uniquely identify their board since more than one board OEM may
use the SSA7785 ThunderBird Avenger™ chip. The Subsystem Vendor ID
register is loaded by an external EEPROM via the Serial Configuration Port
after reset and before any access to the PCI configuration header. The PCI
target logic should force a retry if the Subsystem Vendor ID register has not
completed loading. The Subsystem Vendor ID is read only to the PCI inter-
face. If no external EEPROM is present, then the default Subsystem Vendor
ID is 1004h, that of Philips Semiconductors (VLSI).
PCI CFG 2 D15 D14 D13 D12 D11 D10 D9 D8