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ThunderBird Avenger
TM
PCI Audio SAA7785
Accelerator
Philips Semiconductors Preliminary Specification
1999 Nov 12 55
TABLE 48 Interrupt Pin Register - INTPIN (RO)
TABLE 49 MIN_GNT Register - MINGNT (RO)
TABLE 50 MAX_LAT Register - MAXLAT (RO)
Bit Name R/W Function
7:0 INTLINE RO Interrupt Line. The Interrupt Line register is an eight bit register used to com-
municate interrupt line routing information. The value in this register tells
which input of the system interrupt controller(s) the SSA7785 ThunderBird
Avenger™ Device's interrupt pin is connected to. It is set to 00h to use func-
tion 0’s interrupt line. There is no legacy interrupt support for function 1.
PCI CFG 1D7D6D5D4D3D2D1D0
Offset 3Dh
INTPIN[7:0]
POR Value
00000000
Bit Name R/W Function
7:0 INTPIN RO Interrupt Pin. The interrupt pin register tells which interrupt the SSA7785
ThunderBird Avenger™ device uses. The read only value of 00h implies that
the SSA7785 ThunderBird Avenger™ device shares the INT A interrupt pin
with function 0. There is no legacy interrupt support for function 1.
PCI CFG 1D7D6D5D4D3D2D1D0
Offset 3Eh
MINGNT[7:0]
POR Value
00000000
Bit Name R/W Function
7:0 MINGNT RO Minimum grant specifies how long of a burst period the device needs assum-
ing a clock speed of 33MHz. Since the SSA7785 ThunderBird Avenger™,
function 1, is a target only, this register is read only and set to zero.
PCI CFG 1D7D6D5D4D3D2D1D0
Offset 3Fh
MAXLAT[7:0]
POR Value
00000000