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2.2 Interrupts
2-21
4513/4514 Group User’s Manual
Fig. 2.2.5 Timer 1 constant period interrupt setting example
b3 b0
01
b3 b0
1
g0 h
b3 b0
111
0
0
b3 b0
➀ Disable Interrupts
Timer 1 interrupt is temporarily disabled.
Interrupt enable flag INTE
Interrupt control register V1
“0”
✕✕✕
All interrupts disabled (DI instruction)
Timer 1 interrupt occurrence disabled
(TV1A instruction)
➁ Stop Timer Operation
Timer 1 and prescaler are temporarily stopped.
Dividing ratio of prescaler is selected.
Timer control register W1
✕
Timer 1 stop (TW1A instruction)
Prescaler stop
Prescaler divided by 16 selected
➂ Set Timer Value
Timer 1 count time is set. (The formula is shown ❈A below.)
Timer 1 reload register R1
“52
16”
Timer count value 82 set (T1AB instruction)
➃ Clear Interrupt Request
Timer 1 interrupt activated condition is cleared.
Timer 1 interrupt request flag T1F
“0”
Timer 1 interrupt activated condition cleared
(SNZT1 instruction)
Note when the interrupt request is cleared
When ➃ is executed, considering the skip of the next instruction according to the
interrupt request flag T1F, insert the NOP instruction after the SNZT1 instruction.
➄ Start Timer Operation
Timer 1 and prescaler temporarily stopped are restarted.
Timer control register W1
Timer 1 operation start (TW1A instruction)
Prescaler operation stop
✕
➅ Enable Interrupts
The Timer 1 interrupt which is temporarily disabled is enabled.
Interrupt control register V1
Interrupt enable flag INTE
“1”
Timer 1 interrupt occurrence enabled
(TV1A instruction)
All interrupts enabled (EI instruction)
✕✕✕
Constant period interrupt execution start
❈A The prescaler dividing ratio and timer 1 count value to make the interrupt occur every 1 ms are set as follows.
1 ms ≅ (4.0 MHz) ✕ 3 ✕ 16 ✕ (82+1)
–1
System clock Instruction
clock
Prescaler
dividing
ratio
Timer 1
count
value
“✕”: it can be “0” or “1.”