Filter
Top Products
APPLICATION
2.2 Interrupts
2-22
4513/4514 Group User’s Manual
Fig. 2.2.6 Timer 2 constant period interrupt setting example
0
b3 b0
➀ Disable Interrupts
Timer 2 interrupt is temporarily disabled.
Interrupt enable flag INTE
Interrupt control register V1
“0”
✕✕✕
All interrupts disabled (DI instruction)
Timer 2 interrupt occurrence disabled
(TV1A instruction)
b3 b0
01
1
➁ Stop Timer Operation
Timer is temporarily stopped.
Timer 2 count source is selected.
Timer control register W2
✕
Timer 2 stop (TW2A instruction)
16-bit timer (WDT) underflow signal selected
for count source
➂ Set Timer Value
Timer 2 count time is set. (The formula is shown ❈A below.)
Timer 2 reload register R2
“27
16
”
Timer count value 39 set (T2AB instruction)
➃ Clear Interrupt Request
Timer 2 interrupt activated condition is cleared.
Timer 2 interrupt request flag T2F
“0”
Timer 2 interrupt activated condition cleared
(SNZT2 instruction)
Note when the interrupt request is cleared
When ➃ is executed, considering the skip of the next instruction according to the
interrupt request flag T2F, insert the NOP instruction after the SNZT2 instruction.
b3 b0
111
➄ Start Timer 2 Operation
Timer 2 temporarily stopped is restarted.
Timer control register W2
Timer 2 operation start (TW2A instruction)
✕
b3 b0
1
➅ Enable Interrupts
The timer 2 interrupt which is temporarily disabled is enabled.
Interrupt control register V1
Interrupt enable flag INTE
“1”
Timer 2 interrupt occurrence enabled
(TV1A instruction)
All interrupts enabled (EI instruction)
✕✕✕
Constant period interrupt execution start
❈A The timer 2 count value to make the interrupt occur every about 2 s is set as follows.
2 s ≅ (4.0 MHz) ✕ 3 ✕ 2 ✕ (39+1)
–1
System clock Instruction
clock
16-bit
fixed
dividing
frequency
Timer 2
count
value
16
“✕”: it can be “0” or “1.”