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2.3 Timers
2-29
4513/4514 Group User’s Manual
(5) Timer control register W3
The timer 3 count source selection bits are assigned to bits 0 and 1, the timer 3 count start synchronous
circuit control bit is assigned to bit 2 and the timer 3 control bit is assigned to bit 3.
Set the contents of this register through register A with the TW3A instruction. The TAW3 instruction
can be used to transfer the contents of register W3 to register A.
Table 2.3.5 shows the timer control register W3.
Table 2.3.5 Timer control register W3
Note: “R” represents read enabled, and “W” represents write enabled.
(6) Timer control register W4
The timer 4 count source selection bits are assigned to bits 0 and 1, and the timer 4 control bit is
assigned to bit 3.
Set the contents of this register through register A with the TW4A instruction. The TAW4 instruction
can be used to transfer the contents of register W4 to register A.
Table 2.3.6 shows the timer control register W4.
Table 2.3.6 Timer control register W4
Timer control register W3 at reset : 00002 at RAM back-up : state retained
R/W
Stop (state retained)
Operating
Count start synchronous circuit not selected
Count start synchronous circuit selected
Count source
Timer 2 underflow signal
Prescaler output
Not available
Not available
Timer 3 control bit
Timer 3 count start synchronous
circuit control bit
Timer 3 count source selection
bits
W33
W32
W31
W30
0
1
0
1
W31
0
0
1
1
W30
0
1
0
1
Timer control register W4 at reset : 00002 at RAM back-up : state retained
R/W
Stop (state retained)
Operating
This bit has no function, but read/write is enabled.
Count source
Timer 3 underflow signal
Prescaler output
CNTR1 input
Not available
Timer 4 control bit
Not used
Timer 4 count source selection
bits
W43
W42
W41
W40
0
1
0
1
W41
0
0
1
1
W40
0
1
0
1
Note: “R” represents read enabled, and “W” represents write enabled.