Renesas 4513 Network Card User Manual


 
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HARDWARE
4513/4514 Group User’s Manual
FUNCTION BLOCK OPERATIONS
Count source
• Instruction clock
• Prescaler output (ORCLK)
• Timer 1 underflow
• Prescaler output (ORCLK)
• CNTR0 input
• 16-bit timer underflow
• Timer 2 underflow
• Prescaler output (ORCLK)
• Timer 3 underflow
• Prescaler output (ORCLK)
• CNTR1 input
• Instruction clock
Structure
Frequency divider
8-bit programmable
binary down counter
(link to P30/INT0 input)
8-bit programmable
binary down counter
8-bit programmable
binary down counter
(link to P31/INT1 input)
8-bit programmable
binary down counter
16-bit fixed dividing
frequency
Circuit
Prescaler
Timer 1
Timer 2
Timer 3
Timer 4
16-bit timer
Use of output signal
• Timer 1, 2, 3 and 4 count sources
• Timer 2 count source
• CNTR0 output
• Timer 1 interrupt
• Timer 3 count source
• Timer 2 interrupt
• CNTR0 output
• Timer 4 count source
• Timer 3 interrupt
• CNTR1 output
• Timer 4 interrupt
• CNTR1 output
• Watchdog timer
(The 15th bit is counted twice)
• Timer 2 count source
(16-bit timer underflow)
Frequency
dividing ratio
4, 16
1 to 256
1 to 256
1 to 256
1 to 256
65536
Control
register
W1
W1
W6
W2
W6
W3
W6
W4
W6
The 4513/4514 Group timer consists of the following circuits.
Prescaler : frequency divider
Timer 1 : 8-bit programmable timer
Timer 2 : 8-bit programmable timer
Timer 3 : 8-bit programmable timer
Timer 4 : 8-bit programmable timer
(Timers 1 to 4 have the interrupt function, respectively)
16-bit timer
Prescaler and timers 1 to 4 can be controlled with the timer control
registers W1 to W6. The 16-bit timer is a free counter which is not
controlled with the control register.
Each function is described below.
Table 9 Function related timers